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This memory’s magnetic

Magnetoresistive RAM could well change the way computers and related devices work. By Priya Jain

Magnetoresistive random access memory (MRAM) is the new kid on the memory chip block. The introduction of a 4 MB MRAM module costing $25 by US-based Freescale in July 2006 was a shot across conventional computer memory’s bow that can’t be ignored.

MRAM is still in the laboratory stage, and it is being produced on older, non-critical fabs. As demand for flash outstrips supply, it appears that it will take some time before a company gives up one of its latest fabs for MRAM production. Moreover, MRAM designs do not come close to flash in terms of cell size, even with the same fab. Toshiba and NEC have announced a 16 Mbit MRAM chip with a new power-forking design that achieves a transfer rate of 200 MBps, with a 34 ns cycle time—the best performance of any MRAM chip yet. It also boasts the smallest physical size in its class of 78.5 square millimeters and a low power requirement of 1.8 volts. In December 2005, Sony announced the first lab-produced spin-torque-transfer MRAM.

MRAM is a non-volatile memory technology that stores data magnetically, much as a hard drive does. Conventional RAM chips lose data when the power is switched off. That’s where MRAM scores for it continues to hold information even after power is switched off. Over and above this, MRAM provides faster read and write access and it does not degrade over time.

"Before it can move into widespread production, MRAM needs to move to the 65 nm process like most advanced memory devices, and it must use Spin Transfer Torque (STT)." Sankaranarayanan Kalathil Engineer Fellow, Research and Technology Domain, Honeywell Technology Solutions Lab Pvt. Ltd.

Sankaranarayanan Kalathil, Engineer Fellow, Research and Technology Domain, Honeywell Technology Solutions Lab Pvt Ltd, says, “Unlike conventional RAM technologies—Flash and DRAM—MRAM does not store data as electric charge or current flow. It uses magnetic storage elements to do so and is based on spintronics or spin based electronics, a nanotechnology that utilises the spin property of electrons in addition to the charge that is used in conventional electronics. Spintronics makes it possible to combine both logical and memory functions in a single module.”

How it works

MRAM technology utilises spin dependent tunneling based Magnetic Tunnel Junctions (MTJs) to store information. MRAM development began in the early nineties with Anisiotropic Magnetoresistance (AMR) technology. A technology expert from Intel comments, “MRAM stores data with magnetic polarisation as opposed to electric charge. The data is detected by detecting mangnetoresistive changes rather than detecting changes in electric potential or voltage.”

The elements of MRAM are formed from two ferromagnetic plates, each of which can hold a magnetic field, separated by a thin insulating layer. One of the two plates is a permanent magnet set to a particular polarity. The other field changes to match an external field. A memory device is built from a grid of such cells.”

The architecture of MRAM differs from that of other memory interfaces. Kalathil says, “The essential difference is that MRAM is based on magnetic materials while most other forms of memory use semiconductors. Reading is accomplished by measuring the electrical resistance of a cell. A particular cell is selected by powering an associated transistor, which switches current from a supply line through the cell to ground. In the magnetic tunnel effect, the electrical resistance of the cell changes due to the orientation of the fields in the two plates. By measuring the resulting current, the resistance inside any particular cell can be determined and from this, the polarity of the writeable plate.” Typically if the two plates have the same polarity this is considered as zero, while if the two plates are of opposite polarity the resistance will be higher and this is read as one.

For the write function, each cell lies between a pair of write lines arranged at right angles to each other, above and below the cell. When current passes through them, an induced magnetic field is created at the junction, which is picked up by the writeable plate.

Architectural blues

This approach requires a fairly large current to generate the field and write which makes it less interesting for use in devices where power consumption has to be kept low such as phones or mp3 players. Additionally, as the device is scaled down in size, there comes a time when the induced field overlaps adjacent cells over a small area, leading to potential false writes. This half-select or write disturb problem, appears to set a fairly large minimum size for an MRAM cell.

Standalone memory products using MRAM have been relatively expensive in terms of cost per bit, thus have not been able to compete with other memory technologies namely flash, DRAM or SRAM.

MRAM offers good density and speed and is being considered as a viable technology for System on Chip (SOC). Here, the biggest concern has been the ability to integrate this technology into themainstream Complementary metal–oxide–semiconductor (CMOS) process without negatively impacting its performance and vice versa. Recently, a number of innovations have led to announcements of the technology’s readiness, thus the future of MRAM commercialisation is looking brighter in niche products.

Kalathil says, “Before it can move into widespread production, MRAM needs to move to the 65 nm process like most advanced memory devices. For this it needs to use Spin Transfer Torque (STT). Spin Transfer Switching, uses spin-aligned electrons to directly torque the domains. Specifically, if the electrons flowing into a layer have to change their spin, this will develop a torque that will be transferred to the nearby layer and lower the amount of current needed to write the cells, making it about the same as the read process.”

There are concerns that the older MRAM cells will prove troublesome at higher densities due to the amount of current needed during writes, a problem which STT avoids. For this reason, the STT proponents expect the technique to be used for devices of 65 nm and smaller.

Where MRAM scores

MRAM is not as fast as Static Random Access Memory (SRAM), but it does consume less power. Given its much higher density, a CPU designer may be inclined to use MRAM to offer a much larger but somewhat slower cache, rather than a smaller but faster one. However, it remains to be seen how this trade-off will play out in the future.

The expert from Intel says, “MRAM promises to give the best characteristics required of a memory—the density of DRAM (which is currently the highest) and the speed of SRAM with the non-volatility of flash.”

Kalathil says, “MRAM requires only slightly more power to write than read, and no change in voltage, eliminating the need for a charge pump. This leads to faster operation and lower power consumption. These advantages are overwhelming and it is expected that flash will be the first memory type to be replaced by MRAM. Computers that boot up in a jiffy can become a reality with MRAM.”

Honeywell’s wide ranging products in the space of, automation, sensing and control could be benefited by the power sipping, inexpensive and speedy MRAM chips.

MRAM vs. the rest

MRAM densities are approaching those of DRAM, yet large array sizes are difficult to manufacture. MRAM compares favourably with DRAM in terms of speed with research reporting 30 ns read and write speeds, this is still a long way from the speed of the fastest SRAM modules. In research reports, MRAM has done well in endurance tests yet product reliability is yet to be proven in the field.

Kalathil says, “MRAM can match SRAM in terms of speed and density with lower power consumption than DRAM, and it is much faster and suffers no degradation over time in comparison to flash. It is this combination of features that are leading some to suggest that it will make a good universal memory that will replace SRAM, DRAM and EEPROM as well as flash. This also explains the huge amount of research being carried out into the development of this technology.”

So far, market forces have kept MRAM out of widespread use. Intense pressure in the flash market has driven vendors to aggressively introduce newer versions on the latest fabs, producing 1 Gbit parts on the (currently) highest density 65 nm processes. DRAM offers a considerably lower return on investment due to overproduction, so most DDR2 DRAM is produced on an one-generation-old 90 nm process.

Kalathil affirms, “The fabrication of MRAM being similar to that of standard silicon based Integrated Circuit (IC) technology, its incorporation into small devices as a chip isn’t going to be a great challenge. The power consumption needs to be lowered to the minimum possible for this technology to be used in handheld, battery operated systems.”

A work in progress

The technology has improved significantly over the last few years by focusing on improving the structure of the cells so that they are more sensitive to small changes in magnetic fields. Intel’s expert says, “Companies are trying to achieve a better structure by either improving magnetic materials or making structures which amplify the magnetoresistance effect which has improved to as high as 40 percent as reported in research literature.”

The major bottleneck in MRAM technology has been the ‘write disturb’ or ‘half select’ problem described above that limit how small the memory cell can be. Spin-torque-transfer or Spin Transfer Switching for the write process reduces the write current and helps overcome the ‘half select’ bottleneck. This technology is expected to take MRAM cell size down to 65 nm and below should allow for densities higher than those possible in DRAM (90 nm).

Summing up, the expert from Intel says, “The technology readiness, cost and reliability are yet to be proven. The aim is indeed to provide the memory at the lowest possible cost for use in electronic systems. However, keeping in mind varied system requirements, MRAM memory may not be used in all consumer electronics products as other lower cost options exist.”